™What will computer chips look like in 2045? Dwarkesh Patel interviews Intel's technical leadership (1:09:00)
After two days touring Intel's most advanced fab, Dwarkesh Patel talks with Intel's technical leadership for 1 hour 9 minutes, covering 14A bring-up, transistor evolution, EUV and chip output.
Key points Tap a time to jump
14A bring-up: about 2,000 steps in the factory, with tool sets being finalized and each step fine-tuned.
Lessons from 10nm: originally targeted for 2016, it entered manufacturing in 2018; Intel now limits how much innovation goes into each node to stay on schedule.
Transistor evolution: from planar transistors to FinFET to gate-all-around; gate-all-around was demonstrated in 1988, and Samsung began volume production in 2022.
High-NA EUV trade-offs: TSMC put EUV into volume manufacturing in 2019 and ramped it on 5nm in 2020, while Intel's first EUV process reached products in 2023.
Output bottleneck: AI compute grew about 3x per year over the past decade; Intel's CTO says today's global stock of chipmaking tools would only allow leading-edge wafer output to roughly double, not 10x.
Terafab: rethinking the fab from scratch.
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